Fix: use Simpler namespaces for onboard host helpers

src/a2a3/platform/onboard/host/aicpu_affinity_select.cpp

@@ -15,7 +15,7 @@
 
 #include "common/unified_log.h"
 
-namespace pto::a2a3 {
+namespace simpler::a2a3 {
 
 bool resolve_aicpu_cpu_id_base(int64_t phy_die_id, int32_t &out_cpu_id_base) {
     out_cpu_id_base = 0;
@@ -87,4 +87,4 @@ bool compute_allowed_cpus(
     return true;
 }
 
-}  // namespace pto::a2a3
+}  // namespace simpler::a2a3

src/a2a3/platform/onboard/host/aicpu_topology_probe.cpp

@@ -19,7 +19,7 @@
 #include "common/unified_log.h"
 #include "common/acl_hal_device.h"
 
-namespace pto::a2a3 {
+namespace simpler::a2a3 {
 
 namespace {
 
@@ -130,4 +130,4 @@ bool probe_aicpu_topology(uint32_t device_id, std::vector<AicpuLogicalCpu> &out_
     return true;
 }
 
-}  // namespace pto::a2a3
+}  // namespace simpler::a2a3

src/a2a3/platform/onboard/host/aicpu_topology_probe.h

@@ -14,7 +14,7 @@
 #include <cstdint>
 #include <vector>
 
-namespace pto::a2a3 {
+namespace simpler::a2a3 {
 
 // Two translation units implement this header. aicpu_topology_probe.cpp owns
 // probe_aicpu_topology and includes the CANN driver header for it;
@@ -49,4 +49,4 @@ bool compute_allowed_cpus(
     const std::vector<AicpuLogicalCpu> &user_cpus, int32_t active_count, std::vector<int32_t> &out_allowed_cpus
 );
 
-}  // namespace pto::a2a3
+}  // namespace simpler::a2a3

src/a2a3/platform/onboard/host/context_preparation.cpp

@@ -16,7 +16,7 @@
 
 #include "runtime/rt.h"
 
-namespace pto::a2a3 {
+namespace simpler::a2a3 {
 int ensure_ctrl_table(MemoryAllocator &allocator, int device_id, uint64_t &table, bool &committed) {
     if (committed) return 0;
     const int rc =
@@ -35,4 +35,4 @@ int ensure_c2c_ctrl_address(uint64_t &address, bool &valid) {
     valid = true;
     return 0;
 }
-}  // namespace pto::a2a3
+}  // namespace simpler::a2a3

src/a2a3/platform/onboard/host/context_preparation.h

@@ -15,8 +15,8 @@
 
 class MemoryAllocator;
 
-namespace pto::a2a3 {
+namespace simpler::a2a3 {
 int ensure_ctrl_table(MemoryAllocator &allocator, int device_id, uint64_t &table, bool &committed);
 // A successful zero address is still a completed query. The caller owns the snapshot.
 int ensure_c2c_ctrl_address(uint64_t &address, bool &valid);
-}  // namespace pto::a2a3
+}  // namespace simpler::a2a3

src/a2a3/platform/onboard/host/device_runner.cpp

@@ -197,16 +197,17 @@ int DeviceRunner::fill_persistent_arch_fields(KernelArgs *args, uint64_t device_
 
 int DeviceRunner::ensure_aicpu_topology() {
     if (!aicpu_topology_.empty()) return 0;
-    std::vector<pto::a2a3::AicpuLogicalCpu> topology;
-    if (!pto::a2a3::probe_aicpu_topology(static_cast<uint32_t>(device_id_), topology)) return PTO_RUNTIME_ERR_INTERNAL;
+    std::vector<simpler::a2a3::AicpuLogicalCpu> topology;
+    if (!simpler::a2a3::probe_aicpu_topology(static_cast<uint32_t>(device_id_), topology))
+        return PTO_RUNTIME_ERR_INTERNAL;
     aicpu_topology_ = std::move(topology);
     return 0;
 }
 
 int DeviceRunner::prepare_kernel_arch_context(rtStream_t /*control_stream*/) {
     int rc = ensure_aicore_reg_table(AicoreRegKind::Ctrl);
     if (rc != 0) return rc;
-    rc = pto::a2a3::ensure_c2c_ctrl_address(c2c_ctrl_address_, c2c_ctrl_address_valid_);
+    rc = simpler::a2a3::ensure_c2c_ctrl_address(c2c_ctrl_address_, c2c_ctrl_address_valid_);
     if (rc != 0) return rc;
     return ensure_aicpu_topology();
 }
@@ -486,7 +487,7 @@ int DeviceRunner::prepare_execution(
             runtime.get_aicpu_thread_num(), static_cast<int>(user_cpus.size()), PLATFORM_DEFAULT_AICPU_THREAD_NUM
         );
         if (resolved_aicpu < 0) return PTO_RUNTIME_ERR_INTERNAL;
-        if (!pto::a2a3::compute_allowed_cpus(user_cpus, resolved_aicpu, allowed)) {
+        if (!simpler::a2a3::compute_allowed_cpus(user_cpus, resolved_aicpu, allowed)) {
             LOG_ERROR(
                 "A2A3 AICPU topology has %zu user cpus, cannot fit %d active threads", user_cpus.size(), resolved_aicpu
             );
@@ -738,7 +739,7 @@ int DeviceRunner::ensure_run_streams() {
 // mid-worker is not something a per-run PMU re-query could have made safe.
 int DeviceRunner::ensure_aicore_reg_table(AicoreRegKind kind) {
     if (kind == AicoreRegKind::Ctrl)
-        return pto::a2a3::ensure_ctrl_table(
+        return simpler::a2a3::ensure_ctrl_table(
             mem_alloc_, device_id_, aicore_ctrl_reg_table_dev_, aicore_ctrl_reg_table_committed_
         );
     const bool is_pmu = kind == AicoreRegKind::Pmu;

src/a2a3/platform/onboard/host/device_runner.h

@@ -327,7 +327,7 @@ class DeviceRunner : public DeviceRunnerBase {
     int ensure_aicpu_topology();
     uint64_t c2c_ctrl_address_{0};
     bool c2c_ctrl_address_valid_{false};
-    std::vector<pto::a2a3::AicpuLogicalCpu> aicpu_topology_;
+    std::vector<simpler::a2a3::AicpuLogicalCpu> aicpu_topology_;
 
     // Release the resources this run owns, in runtime-argument, register-buffer,
     // then stream order. Collectors are not among them: their device resources

src/a5/platform/onboard/host/aicpu_affinity_select.cpp

@@ -28,7 +28,7 @@
 #include "common/platform_config.h"
 #include "common/unified_log.h"
 
-namespace pto::a5 {
+namespace simpler::a5 {
 
 using detail::CpuTopologyData;
 using detail::CpuTopologyEntry;
@@ -1125,4 +1125,4 @@ std::string format_aicpu_topology_json(
     return out.str();
 }
 
-}  // namespace pto::a5
+}  // namespace simpler::a5

src/a5/platform/onboard/host/aicpu_topology_probe.cpp

@@ -18,7 +18,7 @@
 #include "common/acl_hal_device.h"
 #include "common/unified_log.h"
 
-namespace pto::a5 {
+namespace simpler::a5 {
 namespace {
 
 using pto::driver::CpuTopology;
@@ -107,4 +107,4 @@ bool probe_aicpu_topology(
     return detail::build_aicpu_topology(device_occupancy, soc_name, available, topo, out_topology);
 }
 
-}  // namespace pto::a5
+}  // namespace simpler::a5

src/a5/platform/onboard/host/aicpu_topology_probe.h

@@ -16,7 +16,7 @@
 #include <string>
 #include <vector>
 
-namespace pto::a5 {
+namespace simpler::a5 {
 
 // aicpu_topology_probe.cpp owns driver queries. aicpu_affinity_select.cpp
 // owns topology assembly, fallback and CPU selection without CANN dependencies.
@@ -210,4 +210,4 @@ bool build_aicpu_topology(
 
 }  // namespace detail
 
-}  // namespace pto::a5
+}  // namespace simpler::a5

src/a5/platform/onboard/host/context_preparation.cpp

@@ -20,7 +20,7 @@
 #include "common/platform_config.h"
 #include "runtime_c_api.h"
 
-namespace pto::a5 {
+namespace simpler::a5 {
 int ensure_ctrl_table(MemoryAllocator &allocator, int device_id, uint64_t &table, bool &committed) {
     if (committed) return 0;
     const int rc = init_aicore_register_addresses(&table, static_cast<uint64_t>(device_id), allocator);
@@ -74,4 +74,4 @@ int query_device_aicpu_occupancy(
     out.os_sched_valid = result.os_sched_rc == 0;
     return 0;
 }
-}  // namespace pto::a5
+}  // namespace simpler::a5

src/a5/platform/onboard/host/context_preparation.h

@@ -19,12 +19,12 @@ namespace host {
 class LoadAicpuOp;
 }
 
-namespace pto::a5 {
+namespace simpler::a5 {
 int ensure_ctrl_table(MemoryAllocator &allocator, int device_id, uint64_t &table, bool &committed);
 // Scratch and pending-write state belong to the calling DeviceRunner.
 int query_device_aicpu_occupancy(
     MemoryAllocator &allocator, host::LoadAicpuOp &loader, rtStream_t stream, void *&scratch, bool &pending,
     AicpuDeviceOccupancy &out
 );
 int release_aicpu_query_result(MemoryAllocator &allocator, rtStream_t stream, void *&scratch, bool &pending);
-}  // namespace pto::a5
+}  // namespace simpler::a5

src/a5/platform/onboard/host/device_runner.cpp

@@ -201,7 +201,7 @@ int DeviceRunner::destroy_comm_stream(void *stream) {
 int DeviceRunner::prepare_kernel_arch_context(rtStream_t control_stream) {
     const int rc = ensure_aicore_reg_table();
     if (rc != 0) return rc;
-    pto::a5::AicpuTopology topology;
+    simpler::a5::AicpuTopology topology;
     return query_aicpu_topology(topology, control_stream);
 }
 
@@ -212,21 +212,21 @@ int DeviceRunner::release_arch_context_resources(bool abandon_device_resources)
         aicpu_topology_query_stream_ = nullptr;
         return 0;
     }
-    const int rc = pto::a5::release_aicpu_query_result(
+    const int rc = simpler::a5::release_aicpu_query_result(
         mem_alloc_, aicpu_topology_query_stream_, aicpu_topology_query_result_, aicpu_topology_query_pending_
     );
     if (rc == 0) aicpu_topology_query_stream_ = nullptr;
     return rc;
 }
 
-int DeviceRunner::query_aicpu_device_occupancy(pto::a5::AicpuDeviceOccupancy &out, rtStream_t control_stream) {
+int DeviceRunner::query_aicpu_device_occupancy(simpler::a5::AicpuDeviceOccupancy &out, rtStream_t control_stream) {
     if (aicpu_device_occupancy_cached_) {
         out = aicpu_device_occupancy_;
         return 0;
     }
     if (!aicpu_topology_query_pending_) aicpu_topology_query_stream_ = control_stream;
-    pto::a5::AicpuDeviceOccupancy occupancy;
-    const int rc = pto::a5::query_device_aicpu_occupancy(
+    simpler::a5::AicpuDeviceOccupancy occupancy;
+    const int rc = simpler::a5::query_device_aicpu_occupancy(
         mem_alloc_, load_aicpu_op_, control_stream, aicpu_topology_query_result_, aicpu_topology_query_pending_,
         occupancy
     );
@@ -243,18 +243,18 @@ int DeviceRunner::query_aicpu_device_occupancy(pto::a5::AicpuDeviceOccupancy &ou
     return 0;
 }
 
-int DeviceRunner::query_aicpu_topology(pto::a5::AicpuTopology &out, rtStream_t control_stream) {
+int DeviceRunner::query_aicpu_topology(simpler::a5::AicpuTopology &out, rtStream_t control_stream) {
     if (aicpu_topology_cached_) {
         out = aicpu_topology_;
         return 0;
     }
 
-    pto::a5::AicpuDeviceOccupancy occupancy;
+    simpler::a5::AicpuDeviceOccupancy occupancy;
     int rc = query_aicpu_device_occupancy(occupancy, control_stream);
     if (rc != 0) return rc;
 
-    pto::a5::AicpuTopology topology;
-    if (!pto::a5::probe_aicpu_topology(static_cast<uint32_t>(device_id_), occupancy, topology))
+    simpler::a5::AicpuTopology topology;
+    if (!simpler::a5::probe_aicpu_topology(static_cast<uint32_t>(device_id_), occupancy, topology))
         return PTO_RUNTIME_ERR_INTERNAL;
 
     aicpu_topology_ = std::move(topology);
@@ -429,7 +429,7 @@ int DeviceRunner::prepare_execution(
     // active count to the available pool, but execution keeps at least one of
     // each role.
     {
-        pto::a5::AicpuTopology topology;
+        simpler::a5::AicpuTopology topology;
         runtime.set_aicpu_allowed_cpu_count(0);
         const rtStream_t control_stream =
             execution_mode_latch().is_kernel() ?
@@ -439,13 +439,13 @@ int DeviceRunner::prepare_execution(
             LOG_ERROR("AICPU topology probe failed; affinity gate will not launch");
             return PTO_RUNTIME_ERR_INTERNAL;
         }
-        pto::a5::AicpuLaunchPlan launch_plan;
+        simpler::a5::AicpuLaunchPlan launch_plan;
         std::string plan_error;
-        if (!pto::a5::build_aicpu_launch_plan(topology, requested_aicpu_num, launch_plan, plan_error)) {
+        if (!simpler::a5::build_aicpu_launch_plan(topology, requested_aicpu_num, launch_plan, plan_error)) {
             LOG_ERROR(
                 "cannot build AICPU launch plan: soc=%s scenario=%s occupy=0x%llx reason=%s",
                 topology.soc_name.empty() ? "(unknown)" : topology.soc_name.c_str(),
-                pto::a5::aicpu_scenario_name(topology.scenario_type),
+                simpler::a5::aicpu_scenario_name(topology.scenario_type),
                 static_cast<unsigned long long>(topology.device_occupancy.occupy), plan_error.c_str()
             );
             return PTO_RUNTIME_ERR_INTERNAL;
@@ -474,11 +474,11 @@ int DeviceRunner::prepare_execution(
                 LOG_WARN(
                     "AICPU CPU_TOPO unavailable; using %s: soc=%s occupy=0x%llx "
                     "stable_reachable=%d requested=%d effective=%d affinity=[%s]%s",
-                    pto::a5::aicpu_topology_source_name(topology.source),
+                    simpler::a5::aicpu_topology_source_name(topology.source),
                     topology.soc_name.empty() ? "(unknown)" : topology.soc_name.c_str(),
                     static_cast<unsigned long long>(topology.device_occupancy.occupy),
                     launch_plan.stable_reachable_count, requested_aicpu_num, active_aicpu_num, dump.c_str(),
-                    topology.source == pto::a5::AicpuTopologySource::kOccupyFallback ?
+                    topology.source == simpler::a5::AicpuTopologySource::kOccupyFallback ?
                         "; physical/SMT/cluster/die placement is unknown" :
                         ""
                 );
@@ -488,15 +488,15 @@ int DeviceRunner::prepare_execution(
                     "AICPU stable reachable CPUs below active capacity: soc=%s scenario=%s occupy=0x%llx "
                     "stable_reachable=%d capacity=%d requested=%d effective=%d affinity=[%s]",
                     topology.soc_name.empty() ? "(unknown)" : topology.soc_name.c_str(),
-                    pto::a5::aicpu_scenario_name(topology.scenario_type),
+                    simpler::a5::aicpu_scenario_name(topology.scenario_type),
                     static_cast<unsigned long long>(topology.device_occupancy.occupy),
                     launch_plan.stable_reachable_count, PLATFORM_DEFAULT_AICPU_THREAD_NUM, requested_aicpu_num,
                     active_aicpu_num, dump.c_str()
                 );
             }
             LOG_INFO(
                 "AICPU ALLOWED_CPUS = [%s] (scenario=%s active=%d launch=%d user_cpus=%zu)", dump.c_str(),
-                pto::a5::aicpu_scenario_name(topology.scenario_type), active_aicpu_num, launch_plan.launch_count,
+                simpler::a5::aicpu_scenario_name(topology.scenario_type), active_aicpu_num, launch_plan.launch_count,
                 topology.os_schedulable_cpus.size()
             );
         }
@@ -1445,7 +1445,7 @@ int DeviceRunner::finalize_collectors(bool abandon_device_resources) {
 // halves the per-core halResMap loop and the live driver-side mappings a worker
 // holds.
 int DeviceRunner::ensure_aicore_reg_table() {
-    return pto::a5::ensure_ctrl_table(
+    return simpler::a5::ensure_ctrl_table(
         mem_alloc_, device_id_, aicore_ctrl_reg_table_dev_, aicore_ctrl_reg_table_committed_
     );
 }

src/a5/platform/onboard/host/device_runner.h

@@ -365,8 +365,8 @@ class DeviceRunner : public DeviceRunnerBase {
     //
     // dep_gen enablement is a5-specific (a2a3 carries its own copy).
 
-    int query_aicpu_device_occupancy(pto::a5::AicpuDeviceOccupancy &out, rtStream_t control_stream);
-    int query_aicpu_topology(pto::a5::AicpuTopology &out, rtStream_t control_stream);
+    int query_aicpu_device_occupancy(simpler::a5::AicpuDeviceOccupancy &out, rtStream_t control_stream);
+    int query_aicpu_topology(simpler::a5::AicpuTopology &out, rtStream_t control_stream);
     void *aicpu_topology_query_result_{nullptr};
     bool aicpu_topology_query_pending_{false};
     rtStream_t aicpu_topology_query_stream_{nullptr};
@@ -376,9 +376,9 @@ class DeviceRunner : public DeviceRunnerBase {
     // allowed CPU selection still runs per call because the requested active
     // count may change. Recovery, reset, and finalize clear both values.
     bool aicpu_device_occupancy_cached_{false};
-    pto::a5::AicpuDeviceOccupancy aicpu_device_occupancy_{};
+    simpler::a5::AicpuDeviceOccupancy aicpu_device_occupancy_{};
     bool aicpu_topology_cached_{false};
-    pto::a5::AicpuTopology aicpu_topology_{};
+    simpler::a5::AicpuTopology aicpu_topology_{};
 
     int init_pmu(int num_cores, int num_threads, int device_id, KernelArgsHelper &kernel_args);
     int init_scope_stats(int num_threads, int device_id, KernelArgsHelper &kernel_args);

src/a5/runtime/tensormap_and_ringbuffer/runtime/runtime.h

@@ -184,7 +184,7 @@ struct alignas(64) DeviceRuntimeLaunchDesc {
 
     // Filter-style affinity gate input (a5 onboard). Host fills before
     // launch from device-side OCCUPY + DSMI CPU_TOPO via
-    // pto::a5::compute_allowed_cpus. The on-device gate keeps threads whose
+    // simpler::a5::compute_allowed_cpus. The on-device gate keeps threads whose
     // sched_getcpu() lands on one of these cpu_ids; exec_idx = position in
     // this array drives sched/orch role assignment. Indices 0..count-2 are
     // scheduler slots, index count-1 is the orchestrator slot. Sized to

tests/ut/cpp/a2a3/platform/test_aicpu_affinity_select.cpp

@@ -43,9 +43,9 @@ void unified_log_info(const char *, const char *, ...) {}
 void unified_log_debug(const char *, const char *, ...) {}
 }
 
-using pto::a2a3::AicpuLogicalCpu;
-using pto::a2a3::compute_allowed_cpus;
-using pto::a2a3::resolve_aicpu_cpu_id_base;
+using simpler::a2a3::AicpuLogicalCpu;
+using simpler::a2a3::compute_allowed_cpus;
+using simpler::a2a3::resolve_aicpu_cpu_id_base;
 
 namespace {