[oharboe]

What

The FakeRAM asap7 backend that AUTO_MEMORIES uses sized a macro from its bit cells. It had a minimum height but no minimum width, so a narrow memory could come out narrower than the platform's power-strap pitch:

• The macro's power pins are horizontal M4 rails. The platform's macro grid connects them to the core's vertical M5 straps, one per net every 5.4 µm and 0.12 µm wide (flow/platforms/asap7/openRoad/pdn/grid_strategy-M1-M2-M5-M6.tcl).
• A macro narrower than that pitch can land between two straps of one net. Its macro grid then gets no shapes, and pdngen fails the whole design:

[WARNING PDN-0232] The grid "CORE_macro_grid_1 - ...useful" (Instance) does not contain any shapes or vias.
[ERROR PDN-0233] Failed to generate full power grid.

This change adds min_width_um, a width floor next to the existing height floor. The asap7 backend sets it to one strap pitch, plus one strap, plus the rails' 0.048 µm inset at both edges: 5.616 µm. A strap of each net then crosses the rails wherever the macro is placed. Wider macros are unchanged.

Where

The asap7 backend lives in patches/fakeram/0001-Add-ORFS-ASAP7-backend.patch, so the change is to that file. The patch is regenerated against the vendored tools/FakeRAM2.0, so its offsets are now exact (the run.py hunks moved by two lines). The unit test is inside the patch too, because the vendored class_process.py only gets the floor from it.

Testing

• Unit test (test/macro_dim_test.py::test_macro_dim_min_width): a 5.054 µm macro is widened to the floor, and a 20.2 µm one is left alone. With the patch applied to the vendored tree, macro_dim_test.py and process_test.py pass, 10 of 10.
• The backend end to end on a 64x16 single-port memory: the macro was 4.18 µm wide and is now 5.7 µm.
• A full design: asap7/tage_update (asap7/tage_update: gather, decide, scatter across distributed SRAMs #4595) has 4, 32 and 128 such macros across its three variants. Every variant failed PDN-0233 at floorplan without the fix. With it, all three run through final. This was tested in bazel-orfs, which applies this backend patch to the vendored FakeRAM.

Nothing in ORFS's own make flow applies patches/fakeram/0001 today, so AUTO_MEMORIES in the make flow does not reach this backend yet. Hooking it up is a separate change, and this PR does not depend on it.

🤖 Generated with Claude Code

[gemini-code-assist]

Code Review

This pull request introduces a minimum width constraint (min_width_um) for the ORFS ASAP7 backend to prevent pdngen failures on narrow macros. It updates the Process class to parse and enforce this minimum width constraint and adds a corresponding unit test. Feedback is provided regarding a potential TypeError if min_width_um is explicitly set to null in the JSON configuration, suggesting a safer fallback using json_data.get("min_width_um") or 0.0.

[openroad-ci]

🔍 QoR check

Metrics reflect the PR merge build — i.e. what will land on the target branch.

Commit de0656c · Jenkins build #1 · Baseline: build · View build on dashboard

62 design(s) checked — 0 with regression(s), 0 without a comparable baseline.

[maliberty]

You didn't upstream the last patch. I'm not going to continue this with diffs to your patches.

[oharboe]

You didn't upstream the last patch. I'm not going to continue this with diffs to your patches.

Ooops... a working accident there, I'll file the cleanup PRs.