armv7a-none-eabi sets both fpregs and soft-float features #162471

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1. jonathanpallant

   added

   C-bugCategory: This is a bug.Category: This is a bug.

   on Sep 8, 2026
2. rustbot

   added

   needs-triageThis issue may need triage. Remove when done. See docs forge.rust-lang.org/release/issue-triagingThis issue may need triage. Remove when done. See docs forge.rust-lang.org/release/issue-triaging

   on Sep 8, 2026
3. jonathanpallant commented on Sep 8, 2026

   

   jonathanpallant

   on Sep 8, 2026

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   Spotted whilst reviewing #160911

   cc @adamgemmell
4. adamgemmell commented on Sep 8, 2026

   

   adamgemmell

   on Sep 8, 2026

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   Not enabling fp registers at all would be consistent with the aarch64 softfloat targets. The platform support docs say this:

   Rust targets ending with eabi use the so-called soft-float ABI: functions which take f32 or f64 as arguments will have those values packed into integer registers. This means that an FPU is not required from an ABI perspective, but within a function floating-point instructions may still be used if the code is compiled with a target-cpu or target-feature option that enables FPU support.

   which implies that this behaviour wasn't intended to be the default.
5. jonathanpallant commented on Sep 8, 2026

   

   jonathanpallant

   on Sep 8, 2026

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   I would be surprised if I was using an *-eabi target and rustc let me use FPU registers in an inline assembly block.

   Which this target currently allows: https://rust.godbolt.org/z/z4s9Yabsr
6. jonathanpallant commented on Sep 8, 2026

   

   jonathanpallant

   on Sep 8, 2026

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   I think this will do the trick:

   diff --git a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
   index 01d55ce979e..a16678dcd42 100644
   --- a/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
   +++ b/compiler/rustc_target/src/spec/targets/armv7a_none_eabi.rs
   @@ -4,7 +4,7 @@
   
    pub(crate) fn target() -> Target {
        Target {
   -        llvm_target: "armv7a-none-eabi".into(),
   +        llvm_target: "arm-none-eabi".into(),
            metadata: TargetMetadata {
                description: Some("Bare Armv7-A".into()),
                tier: Some(2),
   @@ -17,7 +17,7 @@ pub(crate) fn target() -> Target {
            options: TargetOptions {
                cfg_abi: CfgAbi::Eabi,
                llvm_floatabi: Some(FloatAbi::Soft),
   -            features: "+soft-float,-neon,+strict-align".into(),
   +            features: "+v7,+db,+dsp,+aclass,+perfmon,+strict-align".into(),
                max_atomic_width: Some(64),
                has_thumb_interworking: true,
                ..base::arm_none::opts()
   

   $ ./target/debug/diff $(rustup which rustc --toolchain=nightly) $(rustup which rustc --toolchain=stage1) armv7a-none-eabi
   Diffing rustc 1.100.0-nightly (cea272fa3 2026-09-07) vs rustc 1.100.0-dev for target "armv7a-none-eabi"
   Compiler 2 adds : ""
   Compiler 2 drops: "d32, fp64, fpregs, soft-float, vfp2, vfp2sp, vfp3"
   Both have       : "aclass, dsp, thumb2, v5te, v6, v6k, v6m, v6t2, v7, v8m"
7. xizheyin

   added

   O-ArmTarget: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 stateTarget: 32-bit Arm processors (armv6, armv7, thumb...), including 64-bit Arm in AArch32 state

   on Sep 10, 2026
8. github-project-automation

   moved this to To Triage in Arm Maintainerson Sep 10, 2026
9. github-project-automation

   added this to Arm Maintainerson Sep 10, 2026