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Ci v3.6 56 v - #763
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beihia wants to merge 34 commits into
Closed
Ci v3.6 56 v#763beihia wants to merge 34 commits into
beihia wants to merge 34 commits into
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Fw v0.5.6 Release Candidate
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- Reduce SPI clock rate from 5.25MHz to 2.625MHz (BAUDRATEPRESCALER_32) for better timing margin - Add byte-swapping fallback mechanism for robust endianness handling - Fixes ERROR_ABS_SPI_COM_FAIL (error 128) on v3.6 boards with AS5048A encoders Changes: - encoder.cpp L51: Lower SPI baudrate prescaler - encoder.cpp L571-589: Add auto byte-swap retry logic in abs_spi_cb()
This reverts commit 8c95624.
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Is this is a work-in-progress branch that was PR'd by accident? |
added 3 commits
October 18, 2026 21:50
The AMS branch had drifted into accepting shifted/byte-swapped frames whose parity bit was recomputed before checking, so the check always passed and garbage frames were published as pos_abs (it jittered between values while the rotor was standing still). Root cause of the original parity failures was the SPI phase: AS5048A is a mode 1 device (CPOL=0, CPHA=1). The AMS configuration used 1EDGE, which samples one bit too early, shifts the whole 16-bit frame by one bit and breaks parity on nearly every transfer. - CLKPhase: always 2EDGE (mode 1 for AMS, mode 3 for AEAT/MA732) - AMS: strict even-parity + error-flag check, remove shift/swap/parity hacks - Keep the in-flight DMA transaction fix (abs_spi_transaction_pending_) - SPI clock: 2.6MHz (prescaler 32) for signal margin
With the corrected SPI mode 1 timing every frame now fails the parity check, so there is no way to tell from pos_abs alone whether the frames are shifted, byte-swapped or just noise. Record the last 8 raw 16-bit frames plus counters for completed/parity-failing/flag-failing/accepted frames and expose them as read-only endpoints (dbg_raw0..7, dbg_total, dbg_parity_fail, dbg_flag_fail, dbg_ok, dbg_pos). To be removed once the encoder is confirmed working.
The captured frames are perfectly aligned (even parity holds on 139830 of 139832 frames, two adjacent position codes) but bit14, the AS5048A error flag, is set on every frame, so the firmware discards all of them. Probe the MAGNITUDE (0x7FFE) and DIAG/AGC (0x7FFD) registers every 64th transaction and expose them as dbg_mag/dbg_diag, plus dbg_pos_raw which is the angle bits with the error flag ignored, so the angle can be watched while the shaft is turned by hand.
added 6 commits
October 18, 2026 22:29
The captured angle is smooth and covers the full range while the shaft is turned by hand (static noise band ~9 counts), yet the encoder keeps EF=1, so the only thing blocking commissioning is the flag itself. dbg_ignore_ef is a non-persistent runtime switch to accept those frames for bring-up; it resets to false on reboot.
The 0x7FFE/0x7FFD probes raced with the completion callback: when a probe frame's callback ran after the next transaction had already started, the garbage register value was published as an angle and the real angle was dropped. That showed up as ~3% of frames jumping to a fixed wrong value and kept spi_error_rate pinned at 3.1%. Keep only the passive raw-frame history and counters, which do not alter behaviour, and the opt-in ignore_abs_spi_error_flag switch.
The board's encoder asserts the magnetic field error flag on every frame even though its angle is clean, full range and repeatable, and the v3.6 encoder header does not route MOSI, so the chip's clear-error-command cannot be sent. Move the override from a runtime switch into encoder.config so the axis keeps working across power cycles. Default stays false (upstream behaviour); a board that needs it must opt in explicitly. Bump config_version since the config struct grew.
The earlier EMI conclusion was drawn on firmware whose AMS parser rebuilt the parity bit before checking it, so every frame was accepted and pos_abs was noise; the huge calib_scan_response came from that, not from magnetic interference. Record the corrected analysis, the final configuration and the measured closed-loop results, plus the remaining hardware caveat (encoder error flag) and the gain tuning that the small low-friction motor needs.
The first half still records the EMI hypothesis that later turned out to be wrong; make that explicit so the file is not read as current guidance.
A corrupted frame can still carry even parity (the check only catches about half of all bit errors), and a ~335 count jump produces a one-cycle velocity estimate of well over 100 turn/s, which latches ERROR_OVERSPEED even with the rotor standing still. At 8 kHz a 3.6 turn/s machine moves less than 8 counts per control period, so drop any frame that jumps more than 64 counts (8x margin). Count them in dbg_jump_reject.
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