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7b2f5d9
Added linalgGenericEliminateSubmaps and commented out submapToSubviewOp
arpitj1 Aug 1, 2025
71e441f
Canonicalization fix
arpitj1 Aug 1, 2025
e421a86
bug fix for non nullptr in submap creation
arpitj1 Aug 1, 2025
56724a5
Fix in linalg debufferizer - failure return and only insert memref.co…
arpitj1 Aug 1, 2025
c3c2700
improved matcher to create a dependency graph and use it for matching
arpitj1 Aug 1, 2025
ca12291
Runtime failure but match happening correctly to kernel dialect
arpitj1 Aug 3, 2025
7c204f2
Working match for linalg kernel match for gemm
arpitj1 Aug 3, 2025
37dd847
Added debug prints
arpitj1 Aug 3, 2025
7e3f0d0
Able to raise gemv
arpitj1 Aug 4, 2025
3b56eb3
blas C codes- for raising to linalg
arpitj1 Oct 15, 2025
fa99aa8
Debug prints for RaiseTolinalg and 2. SelectFunc pass to process just…
arpitj1 Oct 15, 2025
ed30a14
Update RemoveIterArgs to work with chain ops before store for affine.for
arpitj1 Oct 17, 2025
a816708
Added int op support
arpitj1 Oct 17, 2025
0edd38e
remote iter args improved and test added
arpitj1 Oct 17, 2025
3b8c43b
Implemented improvement in linalg debufferize to work through inverse…
arpitj1 Jan 10, 2026
adaa7a1
Add consumer-blind alloca fallback to --remove-iter-args
arpitj1 May 13, 2026
146322d
Add v2 region-recursive --linalg-debufferize implementation behind a …
arpitj1 May 13, 2026
9cc7f54
Promote v2 region-recursive --linalg-debufferize to default
arpitj1 May 13, 2026
0df59d3
RaiseToLinalg: support non-constant lower bounds via in-body mask
arpitj1 May 13, 2026
6b20d4b
RaiseToLinalg: distribute mixed-body loops before raising (Group C)
arpitj1 May 13, 2026
d278514
RaiseToLinalg: anchor-based chunking in DistributeAffineForOnLinalgGe…
arpitj1 May 13, 2026
a6163ca
RaiseToLinalg: support non-constant upper bounds (Group B / syrk)
arpitj1 May 14, 2026
947b38a
RaiseToLinalg: relax distribute precondition with dep-based check (Gr…
arpitj1 May 14, 2026
9085454
RaiseToLinalg: privatize 0-D scratch alloca to enable distribution
arpitj1 May 14, 2026
0483a61
Add lower-polygeist-submap pass + e2e correctness harness
arpitj1 May 14, 2026
72c5ddd
Add gemm e2e test through linalg-debufferize
arpitj1 May 14, 2026
fcca654
Add multi-kernel e2e correctness harness
arpitj1 May 14, 2026
d70c5db
Extend submap lowering: broadcasts, shift-aware iter bounds, debuf flow
arpitj1 May 14, 2026
0d30e0f
Add egglog-based linalg.generic body matcher prototype
arpitj1 May 15, 2026
f5484d5
kernel_match: iter-dim canonicalization + composition matcher + libra…
arpitj1 May 15, 2026
22497dc
kernel_match_rewrite: CLI tool that emits MLIR with kernel.launch ops
arpitj1 May 15, 2026
bd3b8be
kernel_match: add 4 more 1-step templates (copy, axpby, fma3, sub-fro…
arpitj1 May 15, 2026
aae124d
kernel.launch lowering: Phase-1 roundtrip + Phase-2 canonical defn pass
arpitj1 May 15, 2026
f5e541d
Add PolyBench IR explorer with Compiler Explorer deep links
arpitj1 May 15, 2026
b696be5
Multi-root linalg-debufferize + tensor-form stencil matcher coverage
arpitj1 May 16, 2026
5432cd0
Extend IR explorer with MachSuite + NPB sections + sweep scripts
arpitj1 May 16, 2026
748df63
Scaffold rank-1 row-scratch privatization (disabled in pipeline)
arpitj1 May 16, 2026
59e4146
IR explorer: algorithm-blocker taxonomy + per-kernel blocker column
arpitj1 May 16, 2026
d48a620
Phase-2 cuBLAS-ABI lowering: kernel.launch -> runtime shim func.call
arpitj1 May 23, 2026
e213ee2
IR explorer: polybenchGpu + llama2.c + llm.c sections (+ rewriter fal…
arpitj1 May 23, 2026
4c4295f
Phase-2 cuBLAS-ABI: fix memref ABI bug + cross-compile pipeline + Jet…
arpitj1 May 23, 2026
081cafc
cuBLAS-ABI: lower 4 more matcher symbols (gemm variants, geam-scale, …
arpitj1 May 23, 2026
b417b82
conv2d → cuDNN: extracted kernel + matcher template + ABI lowering + …
arpitj1 May 23, 2026
af4539e
IR explorer: conv2d-extracted is FULL (cudnnConvolution2D_9tap match)
arpitj1 May 23, 2026
4adbfb7
IR explorer: fix broken CE link for conv2d-extracted / conv3d-extracted
arpitj1 May 23, 2026
f88599e
conv2d: surface body-internal weights as launch operands → generic cu…
arpitj1 May 23, 2026
8c87e25
conv2d: FP32 path — dtype-suffixed launch symbol + cuDNN f32 shim
arpitj1 May 23, 2026
d403ced
conv2d: FP16/BF16/INT32/INT16 paths — dtype-suffixed launch symbols +…
arpitj1 May 23, 2026
94bdcee
conv2d: INT32/INT16 end-to-end on Jetson; encoder + rewriter fixes
arpitj1 May 23, 2026
91185df
conv2d INT32/INT16: remove host-fallback in i32 shim, fail fast at cuDNN
arpitj1 May 23, 2026
d57dcae
IR explorer: Phase 2 dtype matrix (conv2d f32/i32/i16) + new blocker …
arpitj1 May 24, 2026
2d5b61b
conv3d: match polybenchGpu's redundant-mul body via Python tuple-AST …
arpitj1 May 24, 2026
bb292c9
IR explorer: conv3d row reflects matcher success; partial-pipeline bl…
arpitj1 May 24, 2026
d9ae673
matcher: support multi-yield linalg.generic in regex parser + Generic…
arpitj1 May 24, 2026
20d8cd1
IR explorer: correct softmax/rmsnorm blocker notes after multi-yield …
arpitj1 May 24, 2026
ec6a5e7
matcher: softmax composition entry; multi-yield encoder + template su…
arpitj1 May 24, 2026
fcf7f90
matcher: rmsnorm 2-step composition entry + scalar-arith capture types
arpitj1 May 24, 2026
adc0794
IR explorer: softmax + rmsnorm now match (partial-pipeline); llmc sof…
arpitj1 May 24, 2026
b081fd9
polygeist_build.sh: unified driver — kernel.c in, optimized binary out
arpitj1 May 24, 2026
717a7df
cgeist: better diagnostic before 'too many arguments in calls' assertion
arpitj1 May 24, 2026
f2b9d9e
gen_wrapper.py: parse plain C array signatures alongside POLYBENCH ma…
arpitj1 May 24, 2026
c03d805
polygeist_build.sh: drop ship-to-Jetson hint output
arpitj1 May 24, 2026
aa054d9
IR explorer: Jetson silicon runtimes per (kernel, dataset)
arpitj1 May 25, 2026
7922e19
cgeist: add --no-inline flag; use it in polybenchGpu bake
arpitj1 May 25, 2026
c30cf84
syrk: silicon-validated on Jetson Orin via cgeist --no-inline path
arpitj1 May 25, 2026
647373e
conv2d: polybenchGpu 9-tap stencil silicon-validated on Jetson Orin
arpitj1 May 25, 2026
726bdeb
lower-kernel-launch-to-cublas: add cublasDgemv + memset_zero_1D handlers
arpitj1 May 25, 2026
eabd3ca
matcher+lowering: gemv transpose discriminator; gemver/gesummv shims
arpitj1 May 25, 2026
03906e8
gesummv/gemver: host-side daxpby + diagnostic note on aarch64 print_a…
arpitj1 May 25, 2026
94ef931
gesummv/atax/bicg now BIT-EXACT: fix gcc IPA + weak-symbol mismatch
arpitj1 May 25, 2026
6b3bf31
runtime: zero-copy on Jetson via cudaHostRegister (no more H↔D bounce)
arpitj1 May 25, 2026
25d706f
runtime: persistent cudaHostRegister cache (no unregister on shim exit)
arpitj1 May 25, 2026
a3b8ef7
explorer: notes column in Jetson runtimes; conv2d rerun + diagnosed
arpitj1 May 25, 2026
4143331
explorer: darknet full-source bake survey + new section
arpitj1 May 25, 2026
c6c05ff
extracted-darknet + fusion optimizations: 9 CNN-block kernels end-to-…
arpitj1 May 25, 2026
28aa17f
PVA backend: lower kernel.launch to libpva_operator for int8/int16 co…
arpitj1 May 26, 2026
65eabea
Make pipeline paths portable
arpitj1 May 29, 2026
a3bea67
Add fused im2col GEMM raising path
arpitj1 May 29, 2026
9eb7cb9
Add tensor LLM lowering paths
arpitj1 May 30, 2026
dfbbda7
Fold guarded stores for tensor softmax
arpitj1 May 31, 2026
e410923
Add larger LLM forward benchmark
arpitj1 May 31, 2026
c6d87c8
Add Llama runtime matching and Jetson benchmarks
arpitj1 Jun 1, 2026
cdff14f
Add Llama extended and stencil benchmark tracking
arpitj1 Jun 1, 2026
d8ce4b1
Add 5x5 stencil matching coverage
arpitj1 Jun 1, 2026
ccaf7b8
Record Jetson 5x5 stencil timings
arpitj1 Jun 2, 2026
f2b6e30
Add generalized ntap stencil matching
arpitj1 Jun 2, 2026
223da71
Use tensor ntap stencil matching
arpitj1 Jun 2, 2026
587176d
Fix cgeist memref and record lowering crashes
arpitj1 Jun 2, 2026
051c8ee
Fix cgeist scalar conditions and pointer subtraction
arpitj1 Jun 2, 2026
e68334f
Add Whisper kernel fixtures and RMSNorm matcher family
arpitj1 Jun 2, 2026
3533122
Fix proxy app raising failures
arpitj1 Jun 5, 2026
4876af2
Add proxy app kernel extraction probes
arpitj1 Jun 5, 2026
daa2c97
Fix proxy kernel linalg raising gaps
arpitj1 Jun 5, 2026
ee323b4
Verify proxy kernel correctness progress
arpitj1 Jun 5, 2026
5e75f1c
Add easy proxy pipeline fixtures
arpitj1 Jun 5, 2026
9d7fccf
Add backend-capable kernel candidate matching
arpitj1 Jun 7, 2026
6300c80
Add custom CUDA 7-point stencil backend
arpitj1 Jun 7, 2026
a4b6902
Add optional CPU BLAS runtime backend
arpitj1 Jun 7, 2026
50adfb4
Raise nested reductions and lower tensor products to cuTensorNet
arpitj1 Jul 21, 2026
ff4e916
Expand ATen raising corpus and split IR explorer
arpitj1 Jul 24, 2026
78ecd33
Add MFEM raising results to IR explorer
arpitj1 Jul 24, 2026
35cadbc
Expand ATen raising and lower MFEM contractions
arpitj1 Jul 24, 2026
d41d930
Generalize MFEM tensor contraction matching
arpitj1 Jul 25, 2026
62c793d
Add raised MFEM application benchmarks
arpitj1 Jul 31, 2026
d5d0d6d
Link MFEM application extracted C in explorer
arpitj1 Jul 31, 2026
eef6803
Complete ATen raising and CUDA library matching phases
arpitj1 Aug 8, 2026
63665f5
Generalize device-resident library lowering and publish kernel results
arpitj1 Aug 10, 2026
120eba2
Expand ATen CUDA library matching and publish silicon results
arpitj1 Aug 11, 2026
4e0386e
Generalize CUDA library lowering and refresh ATen results
arpitj1 Aug 14, 2026
19db6fe
Compose tensor contractions into cuTensorNet networks
arpitj1 Aug 14, 2026
c17cd96
Support device-resident residual GPU pipelines
arpitj1 Sep 3, 2026
6b65601
Record ATen device-resident validation data
arpitj1 Sep 3, 2026
d7c23f1
Regenerate MFEM residual pipeline validation
arpitj1 Sep 3, 2026
9a4c464
Remove stale RMSNorm lowering expectations
arpitj1 Sep 3, 2026
11fbd2b
Test reordered GEMM matching end to end
arpitj1 Sep 3, 2026
3481958
Use Egglog for semantic kernel matching
arpitj1 Sep 3, 2026
a3caff2
Add complete FP32 GEMM lowering support
arpitj1 Sep 4, 2026
5683b83
Add executable loop-aware benchmark idiom lowering
arpitj1 Sep 4, 2026
eb8de3b
Complete cross-compiled Ginsbach idiom validation
arpitj1 Sep 5, 2026
26941a7
Use external CUDA libraries for Ginsbach idioms
arpitj1 Sep 5, 2026
005b401
Add Ginsbach audit to IR viewer
arpitj1 Sep 5, 2026
0bb8317
Add modified-kernel audit page and related-work survey
arpitj1 Sep 5, 2026
45958c6
Raise histograms and dense factorizations
arpitj1 Sep 5, 2026
dd5475c
Normalize dynamic loop nests for Linalg raising
arpitj1 Sep 5, 2026
642188a
Validate histogram and solver library raising
arpitj1 Sep 5, 2026
f53cb8c
Restore ATen dot and zero-init SGEMM matches
arpitj1 Sep 6, 2026
6399618
Evaluate PolyBench Section 4.2 pipelines
arpitj1 Sep 6, 2026
692ba6b
Match fixed cuDNN ATen convolution routes
arpitj1 Sep 6, 2026
a86f7f8
Raise and validate Ginsbach external library idioms
arpitj1 Sep 6, 2026
949b5a1
Match fixed cuDNN average pool3d routes
arpitj1 Sep 6, 2026
a3083ce
Refresh ATen matcher snapshots for viewer
arpitj1 Sep 6, 2026
cea3329
Match ATen Kronecker products with cuTENSOR
arpitj1 Sep 6, 2026
8416ec3
Consolidate PolyBench four-runtime evaluation
arpitj1 Sep 6, 2026
3e249bb
Match remaining ATen CUDA library candidates
arpitj1 Sep 6, 2026
e6065af
Match next ATen library mapping batch
arpitj1 Sep 6, 2026
d421ce9
Batch tiny BLAS patterns and refresh Ginsbach results
arpitj1 Sep 6, 2026
9ba9a51
Fix and validate PolyBench raised GPU paths
arpitj1 Sep 6, 2026
39afbf0
Complete next ATen library mapping batch
arpitj1 Sep 6, 2026
784dc5d
Match Parboil JDS SpMV through cuSPARSE
arpitj1 Sep 6, 2026
4e64c81
Publish validated ATen raised GPU timings
arpitj1 Sep 6, 2026
1ac27af
Complete available PolyBenchGPU baselines
arpitj1 Sep 6, 2026
540fe8b
Record final PolyBench viewer audit
arpitj1 Sep 6, 2026
1335edf
Fix expanded ATen library compositions
arpitj1 Sep 6, 2026
240d543
Recover expanded ATen convolution mappings
arpitj1 Sep 6, 2026
78827c8
Recover expanded ATen 3D convolution mappings
arpitj1 Sep 6, 2026
a2f5fbe
Recover expanded ATen QKV composition
arpitj1 Sep 6, 2026
5beeed3
Recover tensorized ATen CSR SpMV mapping
arpitj1 Sep 6, 2026
01ba808
Map tensorized ATen CSR SpMM to cuSPARSE
arpitj1 Sep 6, 2026
5623f58
Map ATen COO sparse-dense products to cuSPARSE
arpitj1 Sep 6, 2026
74866c8
Map ATen block-sparse matvec to cuSPARSE
arpitj1 Sep 6, 2026
cfa643b
Map ATen sampled CSR addmm to cuSPARSE
arpitj1 Sep 6, 2026
8c18b0f
Map ATen sparse index conversions to cuSPARSE
arpitj1 Sep 6, 2026
771229c
Map ATen quantized column offsets to CUB
arpitj1 Sep 6, 2026
fcfab43
Map ATen adjacent difference to CUB
arpitj1 Sep 6, 2026
82ac97a
Map ATen embedding counts to CUB histogram
arpitj1 Sep 6, 2026
4d42909
Map aligned ATen bilinear upsampling to cuDNN
arpitj1 Sep 6, 2026
aa52450
Map ATen block layout conversion to cuTENSOR
arpitj1 Sep 6, 2026
f07f54e
Map dynamic ATen all-any reduction to CUB
arpitj1 Sep 6, 2026
3107be7
Map ATen row-wise arg reductions to CUB
arpitj1 Sep 6, 2026
27fc7a1
Map ATen nansum composition to CUB
arpitj1 Sep 6, 2026
86e62a8
Map ATen sparse norm composition to cuBLAS
arpitj1 Sep 6, 2026
afca100
Map ATen joint scaling composition to cuBLAS
arpitj1 Sep 6, 2026
552fb25
Correct stale ATen library candidates
arpitj1 Sep 6, 2026
42c2bae
Correct embedding bag backward library routes
arpitj1 Sep 6, 2026
b7b3a1f
Correct rowwise prune library route
arpitj1 Sep 6, 2026
cf8118c
Correct weighted bincount library route
arpitj1 Sep 6, 2026
c1d42db
Correct indexed max-pool library route
arpitj1 Sep 6, 2026
bd7c350
Correct cumprod backward library route
arpitj1 Sep 6, 2026
c77c8fc
Refine whole-algorithm library routes
arpitj1 Sep 6, 2026
41e5660
Refine embedding bag max library route
arpitj1 Sep 6, 2026
a059eab
Correct mixed FP32 INT8 matmul route
arpitj1 Sep 6, 2026
202ee76
Correct packed INT4 matmul route
arpitj1 Sep 6, 2026
b994ef1
Lower NPB MG stencils through cuDNN
arpitj1 Sep 6, 2026
f41db97
Refresh ATen audit after structured rematch
arpitj1 Sep 6, 2026
87f3c14
Refresh ATen library match viewer
arpitj1 Sep 6, 2026
4bedbd4
Update Llama runtime comparison
arpitj1 Sep 6, 2026
9ab9d2d
Fix Llama submap library lowering on CUDA
arpitj1 Sep 7, 2026
2e05f36
Capture mixed GPU pipelines in one CUDA graph
arpitj1 Sep 7, 2026
94b96e2
Update viewer with Llama CUDA graph results
arpitj1 Sep 7, 2026
bb07d79
Record ATen resident GPU benchmark campaign
arpitj1 Sep 7, 2026
bb3d0aa
Record Llama resident session performance
arpitj1 Sep 7, 2026
1822ca7
Unify ATen resident benchmark reporting
arpitj1 Sep 7, 2026
50af36d
Remeasure PolyBench raised GPU pipelines
arpitj1 Sep 7, 2026
20d6c8d
Publish direct Llama GPU timing
arpitj1 Sep 7, 2026
5e20ee5
Coalesce repeated GPU pipeline scopes
arpitj1 Sep 7, 2026
d3d897c
Remeasure coalesced PolyBench GPU kernels
arpitj1 Sep 7, 2026
60b21e1
Document portable C to CPU GPU and PVA flow
arpitj1 Sep 7, 2026
357de99
Propagate zero initialization into BLAS parameters
arpitj1 Sep 7, 2026
58f9759
Fix and publish MFEM full-pipeline validation
arpitj1 Sep 7, 2026
00a92b2
Generalize constant propagation for library lowering
arpitj1 Sep 7, 2026
a7d2229
Update ATen and MFEM evaluation reporting
arpitj1 Sep 7, 2026
40a7a75
Label MFEM CPU hardware in results viewer
arpitj1 Sep 7, 2026
4b3ada5
Add PolyBench symmetric and triangular library matches
arpitj1 Sep 8, 2026
105215f
Update Ginsbach reduction audit results
arpitj1 Sep 8, 2026
5c99f23
Compose projected tensor contraction networks
arpitj1 Sep 8, 2026
9560fcd
Adjudicate ATen native benchmark comparisons
arpitj1 Sep 8, 2026
23dd3c8
Measure persistent MFEM workspace lowering
arpitj1 Sep 8, 2026
ce1e3d9
Fix PolyBench raising and library evaluation gaps
arpitj1 Sep 8, 2026
ca00aeb
test: audit MFEM cuTensorNet matcher safety
arpitj1 Sep 8, 2026
5350f5e
Complete ATen native comparison cohort
arpitj1 Sep 8, 2026
92f6dfe
Publish correctness-gated Llama evaluation
arpitj1 Sep 8, 2026
5fc083e
Add MFEM Section 4.2 publication analysis
arpitj1 Sep 8, 2026
0b806fc
Add PolyBench Section 4.2 paper analysis
arpitj1 Sep 8, 2026
6d2def4
Publish fresh Orin GEMM results
arpitj1 Sep 8, 2026
de8d8b5
Validate MFEM derived application pipelines
arpitj1 Sep 8, 2026
a4e938c
Add Ginsbach Orin exact-region benchmark results
arpitj1 Sep 8, 2026
a3d76ed
Publish FP32 and FP64 GEMM results
arpitj1 Sep 8, 2026
4265683
Publish expanded ATen Section 4.2 results
arpitj1 Sep 9, 2026
eab6853
Rework paper comparison visualizations
arpitj1 Sep 9, 2026
8b2d22b
Fix MFEM 3D integration and publish matcher audit
arpitj1 Sep 9, 2026
d2e6066
Publish logarithmic PolyBench comparison figures
arpitj1 Sep 9, 2026
7eaefc9
Restore linear PolyBench GPU figure
arpitj1 Sep 9, 2026
f28d884
Expand ATen vendor-library benchmark coverage
arpitj1 Sep 9, 2026
9473bb9
Fix PolyBench selected builds and publish Orin reruns
arpitj1 Sep 9, 2026
e5f7d0d
Publish MFEM library mapping table
arpitj1 Sep 9, 2026
528bbbe
Document Llama raising and match coverage
arpitj1 Sep 9, 2026
fbf173e
Add equality saturation paper study
arpitj1 Sep 9, 2026
4c85ae2
Add complete FP32 PolyBench library raising
arpitj1 Sep 9, 2026
5787bb6
Publish PolyBench whole-build cost study
arpitj1 Sep 10, 2026
e58fe1b
Add controlled PolyBench equality saturation study
arpitj1 Sep 10, 2026
46e3c68
Add ATen paper analysis figures and coverage tables
arpitj1 Sep 10, 2026
546b058
Add ATen paper analysis figures and coverage tables
arpitj1 Sep 10, 2026
62ede02
Add compile coverage for 22 MFEM PA families
arpitj1 Sep 10, 2026
0315713
Add compile coverage for 22 MFEM PA families
arpitj1 Sep 10, 2026
6a13d7a
Add controlled PolyBench equality saturation study
arpitj1 Sep 10, 2026
c55b1cf
Show both equality saturation studies
arpitj1 Sep 10, 2026
d4d85dc
Add half-native guide to ATen GPU plot
arpitj1 Sep 10, 2026
abff11e
Add half-native guide to ATen GPU plot
arpitj1 Sep 10, 2026
51fdaac
Refine ATen non-pointwise performance corpus
arpitj1 Sep 10, 2026
8430706
Refine ATen non-pointwise performance corpus
arpitj1 Sep 10, 2026
8271bdf
Add native ATen CUDA library audit provenance
arpitj1 Sep 10, 2026
647a229
Add native ATen CUDA library audit provenance
arpitj1 Sep 10, 2026
3eec02a
Fix strided and transposed GEMM lowering
arpitj1 Sep 10, 2026
e1a935f
Merge raisetolinalg updates
arpitj1 Sep 10, 2026
7e13b50
Add structural PVA image matching and silicon validation
arpitj1 Sep 10, 2026
c8d757c
Complete typed PVA numerical contract validation
arpitj1 Sep 10, 2026
b47364d
Merge typed PVA semantic matching
arpitj1 Sep 11, 2026
a8290f3
Checkpoint LoopLibrarian post-submission implementation and evidence
arpitj1 Nov 10, 2026
fdd0a87
Add regression coverage for typedef integer and float casts
arpitj1 Nov 10, 2026
16dc7b0
Fix library matching and benchmark checks
arpitj1 Nov 10, 2026
d9b145f
Fix Llama inference
arpitj1 Nov 10, 2026
da134e8
Fix GPU benchmarks
arpitj1 Nov 10, 2026
dc578c5
Fix ATen matching and benchmarks
arpitj1 Nov 11, 2026
d44a25f
Fix specification matching
arpitj1 Nov 11, 2026
736ca04
Fix region matching
arpitj1 Nov 11, 2026
71d96a2
Fix library matching
arpitj1 Nov 11, 2026
f62fc09
Fix library integration
arpitj1 Nov 11, 2026
ab346e4
Fix library lowering
arpitj1 Nov 12, 2026
a822dc3
Update benchmark records
arpitj1 Nov 12, 2026
2a0317f
Merge branch updates
arpitj1 Nov 12, 2026
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2 changes: 2 additions & 0 deletions .gitattributes
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issues/polybench_section42/ir/** whitespace=-blank-at-eof,-trailing-space
issues/polybench_section42/logs/** whitespace=-blank-at-eof,-trailing-space
6 changes: 6 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -85,3 +85,9 @@ pythonenv*
# tmp output from tests
*.exec1
*.out1

# Local-environment-specific scripts (carry SSH hostnames, IPs, usernames
# for a particular dev machine + Jetson setup). Each developer has their
# own version of these.
scripts/correctness/run_jetson.sh
scripts/correctness/logs/
3 changes: 3 additions & 0 deletions .gitmodules
Original file line number Diff line number Diff line change
@@ -1,3 +1,6 @@
[submodule "llvm-project"]
path = llvm-project
url = https://github.com/llvm/llvm-project.git
[submodule "third_party/cuSten"]
path = third_party/cuSten
url = https://github.com/munstermonster/cuSten.git
196 changes: 196 additions & 0 deletions BLAS_Implementation_Plan.md
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# BLAS Primitives Implementation and Raising Plan

## Overview
This document outlines the action plan for implementing BLAS primitives in C and raising them to MLIR using the Polygeist pipeline. The goal is to create a comprehensive library of BLAS operations that can be automatically optimized and scheduled.

## Target BLAS Primitives

### Level 1 BLAS (Vector-Vector Operations)
- **DOT**: `sum(x[i] * y[i])` - Dot product of two vectors
- **SCAL**: `x *= alpha` - Scale vector by scalar
- **COPY**: `y = x` - Copy vector
- **AXPY**: `y = alpha * x + y` - Scaled vector addition

### Level 2 BLAS (Matrix-Vector Operations)
- **GEMV**: `y = alpha * A * x + beta * y` - Matrix-vector multiply
- **GER**: `A = alpha * x * y^T + A` - Outer product (rank-1 update)

### Level 3 BLAS (Matrix-Matrix Operations)
- **GEMM**: `C = alpha * A * B + beta * C` - Matrix-matrix multiply

### Matrix Utility Operations
- **LACPY**: Copy matrix with optional transposition
- **LASCL**: `A *= alpha` - Scale matrix by scalar

## Naming Convention
Following standard BLAS naming: `[prefix][type][operation]`
- **Prefix**: `""` (none), `"cublas"`, `"cblas_"`
- **Type**: `s` (float), `d` (double), `c` (complex float), `z` (complex double)
- **Operation**: BLAS function name

Examples:
- `dgemv` - Double precision GEMV
- `sgemm` - Single precision GEMM
- `cublasDgemv` - CUDA double precision GEMV

## Action Items

### Phase 1: C Implementation (Foundation)
- [ ] **1.1** Create basic C implementations for all primitives
- [ ] Implement with proper LDA/stride support
- [ ] Include alpha/beta scaling parameters
- [ ] Add comprehensive error checking
- [ ] Create both simple and optimized versions

- [ ] **1.2** Create test harnesses
- [ ] Unit tests for each primitive
- [ ] Performance benchmarks
- [ ] Verification against reference implementations
- [ ] Edge case testing (zero dimensions, negative strides)

- [ ] **1.3** File structure organization
```
blas/
├── src/
│ ├── level1/ # DOT, SCAL, COPY, AXPY
│ ├── level2/ # GEMV, GER
│ ├── level3/ # GEMM
│ └── utils/ # LACPY, LASCL
├── include/
│ └── blas.h # Header with all declarations
├── tests/
│ ├── test_level1.c
│ ├── test_level2.c
│ └── test_level3.c
└── simple/ # Minimal versions for Polygeist
├── simple_gemm.c
├── simple_gemv.c
└── ...
```

### Phase 2: Polygeist Pipeline Integration
- [ ] **2.1** Test each primitive with cgeist
- [ ] Convert C to initial MLIR: `cgeist primitive.c --function=* --resource-dir=/usr/lib/clang/14 --raise-scf-to-affine -fPIC -S -g -c -o primitive.mlir`
- [ ] Verify successful parsing and basic structure
- [ ] Document any conversion issues

- [ ] **2.2** Apply affine-to-linalg pipeline
- [ ] Run: `polygeist-opt --affine-parallelize --raise-affine-to-linalg-pipeline primitive.mlir -o primitive_linalg.mlir`
- [ ] Verify linalg operations are generated correctly
- [ ] Check for proper loop nest structure

- [ ] **2.3** Apply debufferization
- [ ] Run: `polygeist-opt --linalg-debufferize primitive_linalg.mlir -o primitive_debufferized.mlir`
- [ ] Ensure tensor operations are created properly
- [ ] Verify memory access patterns

- [ ] **2.4** Apply kernel extraction
- [ ] Run: `polygeist-opt primitive_debufferized.mlir --linalg-to-kernel="kernel-library-path=/home/arjaiswal/Polygeist/generic_solver/kernel_library.mlir"`
- [ ] Verify kernel definitions are generated
- [ ] Check integration with existing kernel library

### Phase 3: Kernel Library Integration
- [ ] **3.1** Update kernel library
- [ ] Add all BLAS primitive kernels to `kernel_library.mlir`
- [ ] Ensure consistent naming and interfaces
- [ ] Add metadata for scheduler integration

- [ ] **3.2** Create automation scripts
- [ ] Script to process all BLAS primitives through pipeline
- [ ] Batch processing with error handling
- [ ] Output validation and reporting

- [ ] **3.3** Integration testing
- [ ] Test composite operations using multiple primitives
- [ ] Verify scheduler can handle BLAS operations
- [ ] Performance validation against reference implementations

### Phase 4: Advanced Features
- [ ] **4.1** Multiple precision support
- [ ] Implement float, double, complex variants
- [ ] Template-based approach for code reuse
- [ ] Type-specific optimizations

- [ ] **4.2** GPU backend support
- [ ] CUDA implementations (`cublas*` variants)
- [ ] ROCm implementations
- [ ] Backend selection logic

- [ ] **4.3** Optimization variants
- [ ] Blocked implementations for cache efficiency
- [ ] Vectorized versions
- [ ] Thread-parallel versions

### Phase 5: Scheduler Integration
- [ ] **5.1** Cost model development
- [ ] Performance characterization of each primitive
- [ ] Memory access pattern analysis
- [ ] Scheduling heuristics

- [ ] **5.2** Composition analysis
- [ ] Identify common BLAS operation patterns
- [ ] Fusion opportunities (e.g., GEMV + AXPY)
- [ ] Memory reuse optimization

- [ ] **5.3** End-to-end validation
- [ ] Complex linear algebra algorithms
- [ ] Performance comparison with optimized libraries
- [ ] Correctness verification

## Implementation Priority

### High Priority (Core Operations)
1. **GEMM** - Most computationally intensive, widely used
2. **GEMV** - Foundation for many algorithms
3. **DOT** - Simple but fundamental
4. **AXPY** - Common in iterative methods

### Medium Priority (Supporting Operations)
5. **SCAL** - Simple scaling operation
6. **COPY** - Basic data movement
7. **GER** - Rank-1 updates

### Lower Priority (Utility Operations)
8. **LACPY** - Matrix copying
9. **LASCL** - Matrix scaling

## File Naming Convention
- C implementations: `[type][operation].c` (e.g., `dgemm.c`, `sgemv.c`)
- Simple versions: `simple_[operation].c` (e.g., `simple_gemm.c`)
- MLIR outputs: `[operation]_[stage].mlir` (e.g., `gemm_linalg.mlir`)

## Testing Strategy
- **Unit Tests**: Each primitive tested independently
- **Integration Tests**: Multiple primitives working together
- **Performance Tests**: Comparison with reference implementations
- **Pipeline Tests**: Full Polygeist pipeline for each primitive
- **Regression Tests**: Ensure changes don't break existing functionality

## Success Criteria
- [ ] All primitives successfully convert through Polygeist pipeline
- [ ] Generated kernels integrate with existing kernel library
- [ ] Performance within 80% of reference implementations
- [ ] Scheduler can effectively utilize BLAS operations
- [ ] Documentation and examples complete

## Dependencies
- Polygeist toolchain (cgeist, polygeist-opt)
- Kernel library infrastructure
- Testing framework
- Reference BLAS implementation for validation

## Timeline Estimate
- **Phase 1**: 2-3 weeks (C implementations and tests)
- **Phase 2**: 2-3 weeks (Pipeline integration)
- **Phase 3**: 1-2 weeks (Kernel library integration)
- **Phase 4**: 3-4 weeks (Advanced features)
- **Phase 5**: 2-3 weeks (Scheduler integration)

**Total**: ~10-15 weeks for complete implementation

## Notes
- Start with simple, correct implementations before optimizing
- Maintain compatibility with standard BLAS interfaces
- Document any limitations or assumptions
- Consider memory alignment and padding requirements
- Plan for both CPU and GPU backends from the beginning
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# Polygeist - Claude Instructions

## Environment Setup

Source this before running any commands:
```bash
export POLYGEIST_ROOT=/path/to/Polygeist
source "$POLYGEIST_ROOT/envsetup.sh"
```
This adds `build/bin/` to PATH, making `cgeist` and `polygeist-opt` available.

## Build

Only `build_polygeist.sh` is needed (LLVM/MLIR/Clang are pre-built in `llvm-project/build`).

To rebuild after making changes to any pass:
```bash
cd "$POLYGEIST_ROOT/build" && ninja
```

## Raising Pipeline (C → Linalg)

```bash
# Step 1: C to affine MLIR
cgeist <file.c> --function=* --resource-dir=/usr/lib/clang/14 --raise-scf-to-affine -fPIC -S -g -c -o output.mlir

# Step 2: Affine → Linalg (memref form)
polygeist-opt --select-func="func-name=<funcname>" --remove-iter-args --affine-parallelize --raise-affine-to-linalg-pipeline <input.mlir> -o <output_linalg.mlir>

# Step 3: Debufferize (memref linalg → tensor linalg)
polygeist-opt --linalg-debufferize <input_linalg.mlir> -o <output_debufferized.mlir>

# Step 4: Kernel extraction
polygeist-opt <input_debufferized.mlir> --linalg-to-kernel="kernel-library-path=$POLYGEIST_ROOT/generic_solver/kernel_library.mlir"
```

## Key Source Files

- `lib/polygeist/Passes/RaiseToLinalg.cpp` — raises `affine.for` loops to `linalg.generic`, creates `polygeist.submap` for strided accesses
- `lib/polygeist/Passes/LinalgDebufferize.cpp` — converts memref-based linalg to tensor-based SSA form
- `include/polygeist/PolygeistOps.td` — defines `polygeist.submap` and `polygeist.submapInverse`

## NVIDIA gated-distribution SDKs — point, don't copy

The directory `$PVASOL_ROOT` is the source tree for the PVA
Solutions SDK. The PVA Solutions public `.deb` packages ship binaries only
(`libpva_operator.so`, `libnvcv_types.so`, allowlist file) — *no headers*.
Headers exist only inside the source tree, which NVIDIA distributes to
approved developers through `developer.nvidia.com/embedded/pva`. The headers
are therefore "behind a developer-program gate," not "secret internal-only";
they're the same files any approved external developer would have.

*Rule for using these headers in Polygeist:*

- *Build-time include path is fine.* Add `-I$PVASOL_ROOT/public/src/operator/include`
(and the same pattern for NVCV / cuPVA / CV-CUDA headers under `public/3rdparty/`)
to the cross-compile flags in our build scripts.
- *Never copy headers into the Polygeist tree.* No `cp` / `git add` of any
`.h` / `.hpp` / `.cpp` / `.c` from `$PVASOL_ROOT` into
`$POLYGEIST_ROOT`. The Polygeist repo only ever references those
paths symbolically.
- *Polygeist source code may `#include "OpConv2d.h"` etc.* — the include is
resolved through the `-I` flag at build time, just like cuDNN's `cudnn.h`.
- *Anyone cloning Polygeist without PVA Solutions access gets a clean build
failure* — same as the cuDNN dependency on the cross-compile path today.
- *Same policy applies* to any other gated-distribution NVIDIA SDK source
tree on this VM (cuPVA SDK, internal NVCV builds, etc.).
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