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fix: allow CircuitPython UART construction without parity - #317

Open
YashAnand69 wants to merge 2 commits into
fossasia:mainfrom
YashAnand69:fix/busio-uart-default-parity
Open

YashAnand69 wants to merge 2 commits into
fossasia:mainfrom
YashAnand69:fix/busio-uart-default-parity

Commits

  1. Commits on Oct 11, 2026