Optimising the number of RAM gates #522

Right now if we were to do a circuit consisting predominantly of RAM interactions with 1 RAM array, each one would cost us around 3.25 gates:

1. The memory gate itself
2. Fixing the witness for the timestamp
3. Sorted memory gate
4. 0.25 for the range constraint for timestamp delta in the sorted memory gate.

If we delay the creation of memory gates until circuit finalisation, we can get rid of step 2. We'd simply have to add the relation timestamp_omega - timestamp - 1 == 0 into the RAM memory gate and fix the first timestamp to be 0 or 1. This would allow us to jump to 2.25 gates per interaction + 1 fix_witness + 1 waste gate after the memory gates.